[possible BUG] gcc's vcg creation code (-dv flag)

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[possible BUG] gcc's vcg creation code (-dv flag)
\ Sunzir Deepur (26 Aug 2007)

1 msg	va_ref

Subject:	[possible BUG] gcc's vcg creation code (-dv flag)
Group:	Gcc
From:	Sunzir Deepur
Date:	26 Aug 2007

Hi all,

there is a problem in the vcg file created when compiling the following code
with gcc's -fdump-rtl-stack -dv:

#include <stdio.h>

void fun(void) {
printf("fun\n");
}

int main(void) {
fun();
return 0;
}

the vcg file created has the two nodes "main.0" and "fun.0"
disconnected from the rest of the graph,
i.e. there is no edge from either of them to the rest of the relevant
nodes.

can anyone please hint on why this happen and/or how can
it be fixed ?

thank you
sunzir

ps - i am attaching the original code, the created vcg file, and the rtl file,
for easy reference.

#include <stdio.h>

void fun(void) {
printf("fun\n");
}

int main(void) {
fun();
return 0;
}

graph: {
port_sharing: no
graph: { title: "fun"
folding: 1
hidden: 2
node: { title: "fun.0" }
graph: {
title: "fun.BB1"
folding: 1
color: lightblue
label: "basic block 1"

node: {
title: "fun.6"
color: lightgrey
label: "note 6
NOTE_INSN_BASIC_BLOCK"
}
edge: { sourcename: "fun.6" targetname: "fun.20" }
node: {
title: "fun.20"
color: green
label: "insn 20
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(reg/f:SI 6 bp))
"
}
edge: { sourcename: "fun.20" targetname: "fun.21" }
node: {
title: "fun.21"
color: green
label: "insn 21
(set (reg/f:SI 6 bp)
(reg/f:SI 7 sp))
"
}
edge: { sourcename: "fun.21" targetname: "fun.22" }
node: {
title: "fun.22"
color: green
label: "insn 22
(parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int -8 [0xfffffffffffffff8])))
(clobber (reg:CC 17 flags))
(clobber (mem:BLK (scratch) [0 A8]))
])
"
}
edge: { sourcename: "fun.22" targetname: "fun.8" }
node: {
title: "fun.8"
color: green
label: "insn 8
(set (mem:SI (reg/f:SI 7 sp) [0 S4 A32])
(symbol_ref/f:SI (\"*.LC0\") [flags 0x2] <string_cst 0xb7db3d00>))
"
}
edge: { sourcename: "fun.8" targetname: "fun.9" }
node: {
title: "fun.9"
color: darkgreen
label: "call_insn 9
(set (reg:SI 0 ax)
(call (mem:QI (symbol_ref:SI (\"puts\") [flags 0x41] <function_decl 0xb7d6e000 __builtin_puts>) [0 S1 A8])
(const_int 4 [0x4])))
"
}
edge: { sourcename: "fun.9" targetname: "fun.25" }
node: {
title: "fun.25"
color: green
label: "insn 25
(parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 6 bp)
(const_int 4 [0x4])))
(set (reg/f:SI 6 bp)
(mem:SI (reg/f:SI 6 bp) [0 S4 A8]))
(clobber (mem:BLK (scratch) [0 A8]))
])
"
}
edge: { sourcename: "fun.25" targetname: "fun.26" }
node: {
title: "fun.26"
color: darkgreen
label: "jump_insn 26
(return)
"
}
}
edge: { sourcename: "fun.26" targetname: "fun.999999" color: blue }
edge: { sourcename: "fun.26" targetname: "fun.999999" color: green class: 3 }
node: { title: "fun.999999" label: "END" }
}
graph: { title: "main"
folding: 1
hidden: 2
node: { title: "main.0" }
graph: {
title: "main.BB1"
folding: 1
color: lightblue
label: "basic block 1"

node: {
title: "main.7"
color: lightgrey
label: "note 7
NOTE_INSN_BASIC_BLOCK"
}
edge: { sourcename: "main.7" targetname: "main.29" }
node: {
title: "main.29"
color: green
label: "insn 29
(set (reg:SI 2 cx)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
"
}
edge: { sourcename: "main.29" targetname: "main.30" }
node: {
title: "main.30"
color: green
label: "insn 30
(parallel [
(set (reg/f:SI 7 sp)
(and:SI (reg/f:SI 7 sp)
(const_int -16 [0xfffffffffffffff0])))
(clobber (reg:CC 17 flags))
])
"
}
edge: { sourcename: "main.30" targetname: "main.31" }
node: {
title: "main.31"
color: green
label: "insn 31
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(mem/c:SI (plus:SI (reg:SI 2 cx)
(const_int -4 [0xfffffffffffffffc])) [0 S4 A8]))
"
}
edge: { sourcename: "main.31" targetname: "main.32" }
node: {
title: "main.32"
color: green
label: "insn 32
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(reg/f:SI 6 bp))
"
}
edge: { sourcename: "main.32" targetname: "main.33" }
node: {
title: "main.33"
color: green
label: "insn 33
(set (reg/f:SI 6 bp)
(reg/f:SI 7 sp))
"
}
edge: { sourcename: "main.33" targetname: "main.34" }
node: {
title: "main.34"
color: green
label: "insn 34
(set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(reg:SI 2 cx))
"
}
edge: { sourcename: "main.34" targetname: "main.35" }
node: {
title: "main.35"
color: green
label: "insn 35
(parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int -4 [0xfffffffffffffffc])))
(clobber (reg:CC 17 flags))
(clobber (mem:BLK (scratch) [0 A8]))
])
"
}
edge: { sourcename: "main.35" targetname: "main.9" }
node: {
title: "main.9"
color: darkgreen
label: "call_insn 9
(call (mem:QI (symbol_ref:SI (\"fun\") [flags 0x3] <function_decl 0xb7dd8180 fun>) [0 S1 A8])
(const_int 0 [0x0]))
"
}
edge: { sourcename: "main.9" targetname: "main.11" }
node: {
title: "main.11"
color: green
label: "insn 11
(set (reg:SI 0 ax [orig:58 D.1781 ] [58])
(const_int 0 [0x0]))
"
}
edge: { sourcename: "main.11" targetname: "main.24" }
node: {
title: "main.24"
color: green
label: "insn 24
(use (reg/i:SI 0 ax [ <result> ]))
"
}
edge: { sourcename: "main.24" targetname: "main.38" }
node: {
title: "main.38"
color: green
label: "insn 38
(parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
(clobber (reg:CC 17 flags))
(clobber (mem:BLK (scratch) [0 A8]))
])
"
}
edge: { sourcename: "main.38" targetname: "main.39" }
node: {
title: "main.39"
color: green
label: "insn 39
(parallel [
(set (reg:SI 2 cx)
(mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
])
"
}
edge: { sourcename: "main.39" targetname: "main.40" }
node: {
title: "main.40"
color: green
label: "insn 40
(parallel [
(set (reg/f:SI 6 bp)
(mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
])
"
}
edge: { sourcename: "main.40" targetname: "main.41" }
node: {
title: "main.41"
color: green
label: "insn 41
(parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg:SI 2 cx)
(const_int -4 [0xfffffffffffffffc])))
(clobber (reg:CC 17 flags))
])
"
}
edge: { sourcename: "main.41" targetname: "main.42" }
node: {
title: "main.42"
color: darkgreen
label: "jump_insn 42
(return)
"
}
}
edge: { sourcename: "main.42" targetname: "main.999999" color: blue }
edge: { sourcename: "main.42" targetname: "main.999999" color: green class: 3 }
node: { title: "main.999999" label: "END" }
}
}

;; Function fun (fun)

(note 2 0 3 NOTE_INSN_DELETED)

(note 3 2 6 0 NOTE_INSN_FUNCTION_BEG)

;; Start of basic block 1, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
(note 6 3 20 1 [bb 1] NOTE_INSN_BASIC_BLOCK)

(insn/f 20 6 21 1 (set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(reg/f:SI 6 bp)) -1 (nil)
(nil))

(insn/f 21 20 22 1 (set (reg/f:SI 6 bp)
(reg/f:SI 7 sp)) -1 (nil)
(nil))

(insn/f 22 21 23 1 (parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int -8 [0xfffffffffffffff8])))
(clobber (reg:CC 17 flags))
(clobber (mem:BLK (scratch) [0 A8]))
]) -1 (nil)
(nil))

(note 23 22 8 1 NOTE_INSN_PROLOGUE_END)

(insn 8 23 9 1 (set (mem:SI (reg/f:SI 7 sp) [0 S4 A32])
(symbol_ref/f:SI ("*.LC0") [flags 0x2] <string_cst 0xb7db3d00>)) 40 {*movsi_1} (nil)
(nil))

(call_insn 9 8 10 1 (set (reg:SI 0 ax)
(call (mem:QI (symbol_ref:SI ("puts") [flags 0x41] <function_decl 0xb7d6e000 __builtin_puts>) [0 S1 A8])
(const_int 4 [0x4]))) 751 {*call_value_0} (nil)
(nil)
(nil))

(note 10 9 24 1 NOTE_INSN_FUNCTION_END)

(note 24 10 25 1 NOTE_INSN_EPILOGUE_BEG)

(insn 25 24 26 1 (parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 6 bp)
(const_int 4 [0x4])))
(set (reg/f:SI 6 bp)
(mem:SI (reg/f:SI 6 bp) [0 S4 A8]))
(clobber (mem:BLK (scratch) [0 A8]))
]) -1 (nil)
(nil))

(jump_insn 26 25 27 1 (return) -1 (nil)
(nil))
;; End of basic block 1, registers live:
6 [bp] 7 [sp] 16 [argp] 20 [frame]

(barrier 27 26 19)

(note 19 27 0 NOTE_INSN_DELETED)

;; Function main (main)

(note 2 0 4 NOTE_INSN_DELETED)

(note 4 2 7 0 NOTE_INSN_FUNCTION_BEG)

;; Start of basic block 1, registers live: 6 [bp] 7 [sp] 16 [argp] 20 [frame]
(note 7 4 29 1 [bb 1] NOTE_INSN_BASIC_BLOCK)

(insn/f 29 7 30 1 (set (reg:SI 2 cx)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4]))) -1 (nil)
(expr_list:REG_FRAME_RELATED_EXPR (parallel [
(set/f (reg:SI 2 cx)
(unspec [
(const_int 0 [0x0])
] 15))
(set/f (reg:SI 2 cx)
(unspec [
(reg/f:SI 7 sp)
] 14))
])
(nil)))

(insn 30 29 31 1 (parallel [
(set (reg/f:SI 7 sp)
(and:SI (reg/f:SI 7 sp)
(const_int -16 [0xfffffffffffffff0])))
(clobber (reg:CC 17 flags))
]) -1 (nil)
(nil))

(insn/f 31 30 32 1 (set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(mem/c:SI (plus:SI (reg:SI 2 cx)
(const_int -4 [0xfffffffffffffffc])) [0 S4 A8])) -1 (nil)
(expr_list:REG_FRAME_RELATED_EXPR (set (reg/f:SI 7 sp)
(unspec [
(const_int 4 [0x4])
] 15))
(nil)))

(insn/f 32 31 33 1 (set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(reg/f:SI 6 bp)) -1 (nil)
(nil))

(insn/f 33 32 34 1 (set (reg/f:SI 6 bp)
(reg/f:SI 7 sp)) -1 (nil)
(nil))

(insn/f 34 33 35 1 (set (mem:SI (pre_dec:SI (reg/f:SI 7 sp)) [0 S4 A8])
(reg:SI 2 cx)) -1 (nil)
(nil))

(insn/f 35 34 36 1 (parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int -4 [0xfffffffffffffffc])))
(clobber (reg:CC 17 flags))
(clobber (mem:BLK (scratch) [0 A8]))
]) -1 (nil)
(nil))

(note 36 35 9 1 NOTE_INSN_PROLOGUE_END)

(call_insn 9 36 11 1 (call (mem:QI (symbol_ref:SI ("fun") [flags 0x3] <function_decl 0xb7dd8180 fun>) [0 S1 A8])
(const_int 0 [0x0])) 553 {*call_0} (nil)
(expr_list:REG_EH_REGION (const_int 0 [0x0])
(nil))
(nil))

(insn 11 9 15 1 (set (reg:SI 0 ax [orig:58 D.1781 ] [58])
(const_int 0 [0x0])) 40 {*movsi_1} (nil)
(nil))

(note 15 11 24 1 NOTE_INSN_FUNCTION_END)

(insn 24 15 37 1 (use (reg/i:SI 0 ax [ <result> ])) -1 (nil)
(nil))

(note 37 24 38 1 NOTE_INSN_EPILOGUE_BEG)

(insn 38 37 39 1 (parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
(clobber (reg:CC 17 flags))
(clobber (mem:BLK (scratch) [0 A8]))
]) -1 (nil)
(nil))

(insn 39 38 40 1 (parallel [
(set (reg:SI 2 cx)
(mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
]) -1 (nil)
(nil))

(insn 40 39 41 1 (parallel [
(set (reg/f:SI 6 bp)
(mem:SI (reg/f:SI 7 sp) [0 S4 A8]))
(set (reg/f:SI 7 sp)
(plus:SI (reg/f:SI 7 sp)
(const_int 4 [0x4])))
]) -1 (nil)
(nil))

(insn 41 40 42 1 (parallel [
(set (reg/f:SI 7 sp)
(plus:SI (reg:SI 2 cx)
(const_int -4 [0xfffffffffffffffc])))
(clobber (reg:CC 17 flags))
]) -1 (nil)
(nil))

(jump_insn 42 41 43 1 (return) -1 (nil)
(nil))
;; End of basic block 1, registers live:
0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame]

(barrier 43 42 28)

(note 28 43 0 NOTE_INSN_DELETED)